JPS62532B2 - - Google Patents
Info
- Publication number
- JPS62532B2 JPS62532B2 JP1295579A JP1295579A JPS62532B2 JP S62532 B2 JPS62532 B2 JP S62532B2 JP 1295579 A JP1295579 A JP 1295579A JP 1295579 A JP1295579 A JP 1295579A JP S62532 B2 JPS62532 B2 JP S62532B2
- Authority
- JP
- Japan
- Prior art keywords
- information
- display
- circuit
- output
- ram
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000010365 information processing Effects 0.000 description 2
- 238000010977 unit operation Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Landscapes
- Calculators And Similar Devices (AREA)
- Digital Computer Display Output (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1295579A JPS55105742A (en) | 1979-02-07 | 1979-02-07 | Output information generation circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1295579A JPS55105742A (en) | 1979-02-07 | 1979-02-07 | Output information generation circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS55105742A JPS55105742A (en) | 1980-08-13 |
JPS62532B2 true JPS62532B2 (en]) | 1987-01-08 |
Family
ID=11819686
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1295579A Granted JPS55105742A (en) | 1979-02-07 | 1979-02-07 | Output information generation circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55105742A (en]) |
-
1979
- 1979-02-07 JP JP1295579A patent/JPS55105742A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS55105742A (en) | 1980-08-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4037213A (en) | Data processor using a four section instruction format for control of multi-operation functions by a single instruction | |
JPS5652454A (en) | Input/output control method of variable word length memory | |
JPS5930156A (ja) | マイクロコンピユ−タシステム | |
US4754424A (en) | Information processing unit having data generating means for generating immediate data | |
JPS6122817B2 (en]) | ||
JPS621047A (ja) | メモリ回路を有する半導体装置 | |
JPS6137654B2 (en]) | ||
JPS62532B2 (en]) | ||
JPS59188764A (ja) | メモリ装置 | |
GB1179047A (en) | Data Processing System with Improved Address Modification Apparatus | |
US4031514A (en) | Addressing system in an information processor | |
GB1601956A (en) | Multiprocessor data processing systems | |
JPS5617449A (en) | Transit address confirmation system | |
JPS5617489A (en) | Character display processing system | |
JPH0795269B2 (ja) | 命令コードのデコード装置 | |
JPS627551B2 (en]) | ||
JPS6148174B2 (en]) | ||
JP2624738B2 (ja) | 丸め処理方式 | |
JPS619725A (ja) | マイクロプログラム制御回路 | |
JPS6118783B2 (en]) | ||
JPS6111493B2 (en]) | ||
JPH0226252B2 (en]) | ||
JPH0246266U (en]) | ||
JPS60225253A (ja) | 情報処理装置 | |
JPS5921068B2 (ja) | プログラムステツプ算出方式 |